|POWER, PowerPC, and Power ISA architectures|
|Freescale (formerly Motorola)|
|Cancelled in gray, historic in italic|
In 2004 Freescale announced a new high performance core. Not much was known about it. It would be a multi core, multithreaded design using CoreNet technology, shared with the e500mc core. It would be a three issue core with double precision FPU. Roadmaps showed a target frequency of 3+ GHz, manufactured on a 32 nm process and that the chips would be named on a MPC87xx scheme.
Freescale released a core with similar specifications in June 2010 called the e5500.
- Multi-Core Design: Key Challenges and Opportunities – Power.org
- Freescale Semiconductor reveals PowerPC core roadmap and scalable system-on-chip platforms – Motorola.com
- Freescale to detail dual-core PowerPC G4 – The Register.com
- MPC5121e: Automotive-Qualified Multi-Core Microprocessor for Telematics and Beyond - Power.org
- Power Architecture™ Technology Primer - Freescale.com