Around 1974, IBM were looking at the possibility of constructing a telephone switch to handle a million calls per hour; they estimated that this would require at least a 6 MIPS processor. The group working on this project at the Thomas J. Watson Research Center, including John Cocke, designed a processor for this purpose; the telephone switch project was abandoned in 1975 without the processor having been built, but the processor research continued as the 801 project, starting in October 1975. The name 801 comes from the building the project was housed in, number 801. IBM was looking for ways to improve performance of its existing machines, with project team members studying traces of programs running on System/370 mainframes and looking at the compiler code. From this project came the idea that it was possible to make a very small and very fast core, which could then be used to implement the microcode for any machine.
The initial proposed architecture was a machine with 24-bit registers and without virtual memory.
The project subsequently developed the "fast core" design as a CPU, also called the 801. The resulting CPU was operational by the summer of 1980 and was implemented using Motorola MECL-10K technology on large wire-wrapped custom boards. The CPU was clocked at 66 ns cycles (approximately 15.15 MHz) and could compute at the then-fast speed of approximately 15 MIPS.
The 801 architecture was used in a variety of IBM devices, including channel controllers for their S/370 mainframes (such as the IBM 3090),:377 various networking devices, and eventually the IBM 9370 mainframe core itself. The original version of the 801 architecture was the basis for the architecture of the IBM ROMP microprocessor:378 used in the IBM RT PC workstation computer and several experimental computers from IBM Research.
In the early 1980s the lessons learned on the 801 were put back into the new America Project, which led to the IBM POWER architecture and the RS/6000 deskside scientific microcomputer.
- Radin, G. (1982). The 801 minicomputer. ASPLOS-I. Proceedings of the first international symposium on Architectural support for programming languages and operating systems. pp. 39–47. doi:10.1145/800050.801824. ISBN 0-89791-066-4.
- Cocke, J.; Markstein, V. (January 1990). "The evolution of RISC technology at IBM" (PDF). IBM Journal of Research and Development. 34 (1): 4–11. doi:10.1147/rd.341.0004.
- Cocke, John (March 1988). "The Search For Performance In Scientific Processors". Communications of the ACM. 31 (3): 252. doi:10.1145/1283920.1283945.
- "The 801 Minicomputer - An Overview" (PDF). October 8, 1976. p. 9.
- "System 801 Principles of Operation" (PDF). January 16, 1976.
- Dewar, Robert B.K.; Smosna, Matthew (1990). Microprocessors: A Programmer's View. McGraw-Hill.
- "Altering Computer Architecture is Way to Raise Throughput, Suggests IBM Researchers". Electronics V. 49, N. 25 (23 December 1976), pp. 30–31.
- V. McLellan: "IBM Mini a Radical Departure". Datamation V. 25, N. 11 (October 1979), pp. 53–55.
- Dewar, Robert B.K.; Smosna, Matthew (1990). Microprocessors: A Programmer's View. McGraw-Hill. pp. 258–264.
- Tabak, Daniel (1987). RISC Architecture. Research Studies Press. pp. 69–72.